The output voltage of an unregulated DC-DC converter will reduce as load current increases. Stabilizing an unregulated converter will require the addition of a separate regulator circuit. Often the term converter is used for a circuit that generates a regulated output voltage, meaning that an independent regulator is not necessary.
Linear regulators use a resistive element to create a voltage drop to reduce the input DC voltage down to the required level. While simple in design and low in cost, this type of converter's efficiency depends on the magnitude of the required voltage drop. Switch-mode regulators operate by using the input voltage to fill and energy store and then generate the output voltage from this store.
The store is a capacitive or inductive component or a combination of the two. The main difference from linear converters is that the output voltage can be higher or lower than the input voltage. Component losses determine the efficiency of the circuit. This efficiency is independent of the magnitude of the difference between the input and output voltages. Linear converters have one main performance advantage over switch-mode converters.
They generate very little electrical noise, the quality of the output voltage being dependant on the noise levels of the input voltage source. By contrast, switched converters create significant levels of electrical noise around the switching frequency of the circuit.
Therefore, filtering is required to be applied to the converter's output where noise-sensitive loads are being driven. It can also require input filtering if noise coupling back to the input voltage source could create interference or affect device compliance. A step-down or buck regulator will efficiently lower the input voltage to generate a stable output voltage by switching the input current through an L-C flywheel circuit to drive the load from the stored energy.
The output voltage will be determined by the amount of energy stored when the input voltage is switched on. However, the synchronous converter also passes more noise to the load as it uses two switching MOSFETs for power regulation. The synchronous boost converter will produce double the noise as the asynchronous boost converter as it uses two MOSFETs instead of one.
The duty cycle will determine the maximum and minimum voltage levels that can be output from a typical boost converter. The duty cycle limits can be calculated from the desired output voltage level and efficiency, as shown below.
Duty cycle limits for asynchronous and synchronous boost converters. For the asynchronous converter, VD is the forward voltage drop across the diode. These equations could be solved for the output voltage in terms of the other quantities in these equations. It is also not uncommon to find an L-filter on the input to the converter to remove conducted EMI. This is a useful way to suppress particular sources of EMI when a boost converter is used with another noisy power source.
Placing an inductor on the input before the input capacitor would provide greater low-pass filtering on the input. Note that this additional inductor should not be placed between a full-wave rectifier and capacitor in AC-DC conversion as this will reduce the DC level at the output from the rectifier.
Type of analysis. Functions being simulated. Transient analysis. Examine output voltage and residual ripple on the output. To do this, use a PWM source for switching. DC sweep. This means some of the primary current flows through the coupling capacitor during its discharge phase.
This allows the current in the primary to smoothly ramp downwards which means a transformer with an imperfect coupling coefficient can give less upstream interference than a circuit with a perfect transformer.
If the coupling coefficient was '1' the current in the primary suddenly collapses and transfers its energy to the secondary, but the fast collapsing current can cause interference to upstream circuitry.
If the coupling coefficient is '1', no current flows in the coupling capacitor and the coupling capacitor can be removed. The circuit is now identical to a flyback converter. For a non unity coupling coefficient, current from both windings flows in the FET during the charge cycle. This is easy to picture if we consider the discharge cycle first. Since the average current in the capacitor has to be zero, this implies that when the FET switches ON, an equal and opposite current flows in the capacitor.
Since the output diode is reverse biased, this current can only come from the secondary. So an imperfect transformer means lower upstream interference, but it reduces the efficiency since we now have primary and secondary currents flowing in the FET, thus increasing the FET losses. The current flowing from the secondary also has to flow through the ESR of the coupling capacitor, thus further increasing the losses.
Rsense Calculation. The minimum current sense threshold voltage for the LT is mV. Since the currents in both L1 and L2 flow through the FET and sense resistor at the same time, the peak current can reach 1. We have chosen inductors each with a saturation rating of 1. This implies a sense resistor value of 27mOhms. Choosing Rsense to be 30mOhms should allow enough margin for correct circuit operation without saturating the inductors. The MOSFET needs to be able to handle the peak current from both inductors so in this design a drain source current rating Id of 10A is more than sufficient.
Charge is dictated by the equation:. Since Frequency is the inverse of Time, we can write. So we can calculate the current needed to flow into the chip, just to charge the gate capacitance of the FET.
Again, this needs to be as low as possible, especially since both inductor currents flow at the same time though the MOSFET. Thus, like connecting resistors in parallel, the ON resistance comes down with more parallel paths. However, in connecting Drain Source paths in parallel, a negative effect is that the Gate Source capacitance Qg is also connected in parallel, so a low ON resistance and hence low conduction loss sometimes implies a high gate source capacitance hence high switching loss.
In addition, high current MOSFETs tend to come in much larger packages, so meeting the ideals of low ON resistance and low Qg might violate a space requirement spec, so the selection process has to start over. Engineering, as ever, is a compromise. Failing that, download all the results to a spreadsheet and sort from there.
FDSA Datasheet. Rectifier Diode Choice. Schottky diodes also have a much lower forward voltage drop 0. When choosing a Schottky diode, the key parameters are: forward voltage drop should be as low as possible , forward current this should be greater than the sum of the peak currents in L1 and L2 and reverse voltage rating.
In this design example, the MBRS is a good choice with a reverse voltage rating of 40V and a forward voltage of 0. MBRS Datasheet. Output Capacitor Choice. Unlike the buck converter that has a continuous current flowing from the inductor into the output capacitor, the buck-boost converter output capacitor has to keep the output voltage alive when the inductors are being charged and is hence disconnected from the output.
Therefore there will be a component of the output ripple due to the discharge of the output capacitor. In addition, when the inductors are discharging, the output capacitor will experience an inrush of current and any ESR effective series resistance in the capacitor will also result in ripple.
Therefore the output ripple is made up of 2 components: the ripple caused by the output capacitor discharging when the inductors are being charged and the ripple caused by the inrush current from the inductors into the ESR of the output capacitor. By using our site, you agree to our collection of information through the use of cookies. To learn more, view our Privacy Policy. To browse Academia. Log in with Facebook Log in with Google. Remember me on this computer. Enter the email address you signed up with and we'll email you a reset link.
Need an account? Click here to sign up. Download Free PDF. Sandeep Reddy. A short summary of this paper.
M Hasaneen Adel A.
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